When a system using electronic devices, especially an embedded system, is developed, the development of both hardware and software is necessary. However, generally, software cannot be operated unless hardware to execute the software is completed. Thus, when developing a system involving the development of both software and hardware, conventionally, a method has been adopted wherein hardware that constitutes the system is completed beforehand, and then the software is operated on the hardware completed to check the operation of the entire system.
In the conventional development flow as mentioned above, the operation verification of the entire system including the software is performed in an ending part of the development process. Thus, a potential problem exists that there is a great risk of rework in case any failure is detected. The potential risk affects the quality and development cost of the system more as the system gets larger and more complicated.
In recent years, electronic components have been miniaturized and made to offer high performance due to development of electronics, meanwhile a system to be composed by using electronic components has become large and complicated. Therefore, it has become difficult to ignore the potential risk in the conventional development flow as described above. In order to bypass the risk, in recent years, emulation techniques using an instruction set simulator (ISS) have been receiving a lot of attention. The ISS simulates the operation of an arbitrary processor and peripheral devices on a computer, and the ISS can execute arbitrary software by the processor and the peripheral devices simulated on the computer. Thus, it is possible to check operation of software to be installed on a system before completion of hardware that constitutes the system. That is, by using the ISS, it becomes possible to verify software before completion of hardware, which has been impossible by the conventional development flow. Further, it is possible not only to verify operation of software, but also to check operation and measure performance of a hardware architecture determined in an early stage of development. Accordingly, by a front-loading method, it is possible to bypass a risk of any failure in a downstream process which has potentially existed in the conventional development flow.
An ISS is realized as software that operates on a host being an arbitrary computer when execution of guest code being an arbitrary program is simulated. Therefore, when execution of a program in a great system is simulated by an ISS, it is the execution speed that matters.
There are several methods that are proposed for improving the execution speed.
Patent Literature 1 describes a method for speeding up execution of an ISS by improving efficiency of register mapping at the time when the ISS is executed by dynamic binary translation.
Patent Literature 2 describes a method to simulate peripheral devices, especially mediation of busses in order to utilize an ISS not only for operation verification of software but also for performance analysis of a system.